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74F113SJX спецификации: Dual JK Negative Edge-Triggered Flip-Flop
Аналогичные 74F113SJX
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- 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
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- 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
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- Dual JK# Positive Edge-Triggered Flip-Flop
74F113SJX Datasheet и спецификация
Производитель : Fairchild
Упаковка : SOIC
Pins : 14
Темп. диапазон : Минимум 0 °C | Макс 0 °C
Размер : 64 KB
Заявка : Dual JK Negative Edge-Triggered Flip-Flop
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